AN 307: Intel® FPGA Design Flow for Xilinx* Users

ID 683562
Date 3/20/2018

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Document Table of Contents PACKAGE_PIN

Equivalent to the PACKAGE_PIN constraint in the Xilinx* Vivado* software, PIN_<pin number> is the pin location constraint assignment that the Intel® Quartus® Prime Pro Edition uses.

The following example shows how to set the location for a clock pin on the device.

Example of XDC Command:

# Assign location for the clock pin
set_property PACKAGE_PIN B26 [get_ports clock]

Equivalent QSF Command:

# Assign location for the clock pin
set_location_assignment PIN_AU33 -to clock