Visible to Intel only — GUID: pde1440524484558
Ixiasoft
A.1. CFI Flash Memory Map
A.2. Preparing Design Files for Flash Programming
A.3. Creating Flash Files Using the Nios II EDS
A.4. Programming Flash Memory Using the Board Update Portal
A.5. Programming Flash Memory Using the Nios II EDS
A.6. Restoring the Flash Device to the Factory Settings
A.7. Restoring the MAX V CPLD to the Factory Settings
Visible to Intel only — GUID: pde1440524484558
Ixiasoft
6.4.2.3. JTAG Chain
The JTAG chain control shows all the devices currently in the JTAG chain. The Intel® Arria® 10 GX FPGA device is always the first device in the chain.
Note: When set to 1, switch SW13.6 (MAX BYPASS) includes the MAX V device in the JTAG chain; when set to 0, the MAX V device is removed from the JTAG chain.