Arria 10 GX Transceiver Signal Integrity Development Kit User Guide
ID
683553
Date
8/08/2017
Public
A.1. CFI Flash Memory Map
A.2. Preparing Design Files for Flash Programming
A.3. Creating Flash Files Using the Nios II EDS
A.4. Programming Flash Memory Using the Board Update Portal
A.5. Programming Flash Memory Using the Nios II EDS
A.6. Restoring the Flash Device to the Factory Settings
A.7. Restoring the MAX V CPLD to the Factory Settings
1. About This Development Kit
The Intel® Intel® Arria® 10 GX Transceiver Signal Integrity Development Kit is a complete design environment that includes both the hardware and software you need to develop Arria® 10 GX FPGA designs. The one year license for the Intel® Quartus® Prime Design Suitesoftware provides everything you need to begin developing custom Arria® 10 GX FPGA designs.
The following list describes what you can accomplish with the kit:
- Evaluate transceiver performance from 611 Mbps up to 17.4 Gbps.
- Generate and check pseudo-random binary sequence (PRBS) patterns.
- Dynamically change differential output voltage (VOD) pre-emphasis, and equalization settings to optimize transceiver performance for your channel.
- Perform jitter analysis.
- Verify physical medium attachment (PMA) compliance to PCI Express* ( PCIe* ), Gbps Ethernet (GbE), XAUI, CEI-6G, Serial RapidIO® , high-definition serial digital interface (HD-SDI) and other major standards.