Arria 10 GX Transceiver Signal Integrity Development Kit User Guide

ID 683553
Date 8/08/2017
Document Table of Contents

5.8.1. User-Defined Push Buttons

The development board includes 8 user-defined push buttons and 4 system push buttons that allow you to interact with the Intel® Arria® 10 GX FPGA device. When you press and hold down the push button, the device pin is set to logic 0; when you release the push button, the device pin is set to logic 1. There is no board-specific function for these general user push buttons.

The table below lists the push buttons, schematic signal names and their corresponding Intel® Arria® 10 GX FPGA device pin numbers.
Table 10.  User-Defined Push Buttons
Board Reference Schematic Signal Name Description Arria 10 Device Pin Number
S1 USER_PB0 User push button AU22 (Arria 10 GX)
S2 USER_PB1 User push button BA25 (Arria 10 GX)
S3 USER_PB2 User push button AY25 (Arria 10 GX)
S4 USER_PB3 User push button AY24 (Arria 10 GX)
S5 USER_PB4 User push button BA24 (Arria 10 GX)
S6 USER_PB5 User push button AU25 (Arria 10 GX)
S7 USER_PB6 User push button AV25 (Arria 10 GX)
S8 USER_PB7 User push button AY22 (Arria 10 GX)
S9 PGM_SEL System push button B13 (MAX V)
S10 PGM_CONFIG System push button D12 (MAX V)
S11 MAX_RESETn System push button M9 (MAX V)
S12 CPU_RESETn System push button C12 (MAX V), BD27 (A10)