Arria 10 GX Transceiver Signal Integrity Development Kit User Guide
ID
683553
Date
8/08/2017
Public
A.1. CFI Flash Memory Map
A.2. Preparing Design Files for Flash Programming
A.3. Creating Flash Files Using the Nios II EDS
A.4. Programming Flash Memory Using the Board Update Portal
A.5. Programming Flash Memory Using the Nios II EDS
A.6. Restoring the Flash Device to the Factory Settings
A.7. Restoring the MAX V CPLD to the Factory Settings
5.2. Arria 10 FPGA
The development board features the Intel® Arria® 10 GX115 FPGA (10AX115F1932C).
Intel® Arria® 10 GX FPGA Device Features :
- 1.15M Logic Elements (LEs)
- 427,200 Adaptive Logic Modules (ALMs)
- 1,708,800 Registers
- 54,260 Kb of M20K Memory
- 12,984 Kb of MLAB Memory
- 1518 Variable Precision Digital Signal Processing (DSP) Blocks
- 3036 18-bit x 19-bit Multipliers
- 32 Fractional Synthesis Phase-Locked Loops (PLLs)
- 72 15Gbps Transceivers