Arria 10 GX Transceiver Signal Integrity Development Kit User Guide

ID 683553
Date 8/08/2017
Document Table of Contents

5.8.4. Character LCD

A 16 character x 2 line LCD display will be connected to the Intel® Arria® 10 GX FPGA device to display board information and IP address. The LCD module used is New Haven - NHD-0216K3Z-NSW-BBW-V3. This LCD module will be mounted to the Intel® Arria® 10 GX transceiver signal integrity development board using a 1 x 10 vertical male 0.1” header on the left side of the module and 3 plastic standoffs. This mounting scheme will allow low profile (less than 0.5 inches in height) components to be placed underneath the LCD module, preserving board real-estate.

The table below summarizes the LCD pin assignments. The signals name and directions are relative to the Intel® Arria® 10 GX FPGA device

Table 13.  LCD Pin Assignments and Schematic Signal Names
Board Reference (J20) Schematic Signal Name Description

SPI Slave Select option - voltage level translated from 5V to 1.8V


SPI Slave Select option

7 I2C_5V_SCL I2C serial clock
8 I2C_5V_SDA I2C serial data