Arria 10 GX Transceiver Signal Integrity Development Kit User Guide

ID 683553
Date 8/08/2017
Public
Document Table of Contents

A.3. Creating Flash Files Using the Nios II EDS

If you have an FPGA design developed using the Intel® Quartus® Prime software, and software developed using the Nios® II EDS, follow these instructions:

  1. On the Windows Start menu, click All Programs > Altera > Nios II EDS > Nios II Command Shell.
  2. In the Nios II command shell, navigate to the directory where your design files reside and type the following Nios II EDS commands:

    For Quartus II .sof files:

    sof2flash --input=<yourfile>_hw.sof --output=<yourfile>_hw.flash --offset=0x02b40000

    --pfl --optionbit=0x00030000 --programmingmode=PSr

    For Nios II .elf files:

    elf2flash --base=0x0 --end=0x0FFFFFFF --reset=0x09140000 --input=<yourfile>_sw.elf

    --output=<yourfile>_sw.flash

    --boot=$SOPC_KIT_NIOS2/components/altera_nios2/boot_loader_cfi.srecr

    The resulting .flash files are ready for flash device programming. If your design uses additional files such as image data or files used by the runtime program, you must first convert the files to .flash format and concatenate them into one .flash file before using the Board Update Portal to upload them.

    The Board Update Portal standard .flash format conventionally uses either one of these listed below:-
    • <filename>_hw.flash for hardware design files

    • <filename>_sw.flash for software design files.