Multi Channel DMA Intel® FPGA IP for PCI Express Design Example User Guide

ID 683517
Date 4/29/2022
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3.5.2.3.3. Run the Reference Example Application

  1. Build the reference application.
    $ cd software/user/cli/perfq_app/
    $ make clean && make all
    $ ./perfq_app -h
  2. This command displays the available options in the application, as shown in the image below:

    Refer to the README file located in the software/user/cli/perfq_app directory for more information.

  3. Do a PIO test to check if the setup is correct. If successful, the application displays a Pass status as shown in the image below:

    Here the -b option should be provided with the correct BDF in the system.

  4. Perform IP reset.

    This step will perform an IP Reset. You can perform this step before every run.

    Build devmem utility:
    $ cd software/user/cli/devmem
    $ make clean all
    $ ./devmem 0000:01:00.0 0 0x00200120 0x1
  5. Example of testing a loopback design with the following configuration:
    Command:
    $ ./perfq_app -b 0000:01:00.0 -p 32768 -l 5 -i -c 2 -d 2 -a 4

    Configuration:

    1. bdf (-b 0000:01:00.0)
    2. 2 channels (-c 2)
    3. Loopback (-i)
    4. Payload length of 32,768 bytes in each descriptor (-p 32768)
    5. Time Limit (-l 5)
    6. Debug log enabled (-d 2)
    7. One thread per queue (-a 4)
    Note: This hardware test was run with the Intel® Stratix® 10 GX H-tile PCIe Gen3 x16 configuration.
    Note: This hardware test was run with the Intel Agilex P-Tile PCIe Gen4x16 configuration.
    Figure 44. Custom Driver Gen4 x16 : P-Tile Hardware Test Result
  6. Example of verifying on AVMM DMA:
    Modify the below micro in the file: user/common/include/ifc_libmqdma.h
    #define PCIe_SLOT 0 /* 0 - x16, 1 - x8 */
    Command:
    $ ./perfq_app -b 0000:01:00.0 -p 32768 -l 5 -i -c 2 -d 2 -a 4

    Configuration:

    1. bdf (-b 0000:01:00.0)
    2. 2 channels (-c 2)
    3. Loopback (-i)
    4. Payload length of 32768 bytes in each descriptor (-p 32768)
    5. Time Limit set to 5 (-l 5)
    6. Debug log enabled (-d 2)
    7. One thread per queue (-a 4)
    Note: To test the data validity, you need to perform H2D then D2H operations.
    Figure 45. Custom AVMM DMA Gen4 x16 : P-Tile Hardware Test Result
Note: Execute the following command for MSIX:
$ulimit -n 8192

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