Multi Channel DMA Intel® FPGA IP for PCI Express Design Example User Guide

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ID 683517
Date 4/29/2022
Public
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3.5.2.4.3.1. Example of Verifying on an AVMM Design

Modify the below macro in the following file: user/common/include/ifc_libmqdma.h

#define PCIe_SLOT 0 /* 0 – x16, 1 – x8 */
Use this command:
Command: $ ./perfq_app -b 0000:01:00.0 -p\  
32768 -l 5 -i  -c 2 -d 2 -a 4
Configuration:
  • bdf (-b 0000:01:00.0)
  • 1 channel (-c 2)
  • Loopback (-i)
  • Payload length of 32768 bytes in each descriptor (-p 32768)
  • Time limit set to 5 (-l 5)
  • debug log enabled (-d 2)
  • One thread per queue (-a 4)
Note: Reset the IP before starting DMA by using the following command: ./build/mcdma-test -- -b <bdf> -e

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