Multi Channel DMA Intel® FPGA IP for PCI Express Design Example User Guide

ID 683517
Date 4/29/2022

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If the BAS support is enabled on hardware, enable the following flag in: user/common/include/ifc_libmqdma.h
#define PCIe_SLOT 0 /* 0 – x16, 1 – x8 */


  1. To verify the write operation:
    ./cli/perfq_app/ perfq_app -b\ 
    0000:01:00.0 -s 512 -e -t 
    Figure 54. BAS Write Operation
  2. To verify the read operation:
    ./cli/perfq_app/perfq_app -b\ 
    0000:01:00.0 -s 512 -e -r    
    Figure 55. BAS Read Operation
  3. To verify the write and read operation:
    ./cli/perfq_app/perfq_app -b\ 
    0000:01:00.0 -s 512 -e -z    
    Figure 56. BAS Write and Read Operation

    Performance test:

    The below log is collected on Gen3x16 H-tile
    ./cli/perfq_app/perfq_app  -b\ 
    0000:01:00.0 -s 1048576 –-bas_perf -z
    Figure 57. Performance Test

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