Multi Channel DMA Intel® FPGA IP for PCI Express Design Example User Guide

ID 683517
Date 4/29/2022
Public

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Document Table of Contents

The MCDMA BAS programming sequence consists of the following steps defined in the following sections:

Using Traffic Generator (Write in Host Memory)

The following is the programming sequence:
  1. Allocate DMA-able memory in the host system.
  2. Program the base address with the write_map_table with the physical address of the table.
  3. Set the write address register with the offset in the block where the Traffic generator needs to write the data.
  4. Set how many number of bursts BAS should write in the host memory in the WRITE_COUNT register.
  5. Set enable bit to start traffic generation.

Using Traffic Checker (Reads from Host Memory)

The following belongs to Traffic checker:
  1. Allocate DMA-able memory in the host system.
  2. Program the base address with the read_map_table with the physical address of the host memory.
  3. Set the read address register with the offset in the block where the Traffic generator needs to read the data.
  4. Set how many number of bursts BAS should read in the host memory in the READ_COUNT register.
  5. Set enable bit to start traffic generation.

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