Agilex™ 7 FPGAs and SoCs Device Overview

ID 683458
Date 4/01/2024
Document Table of Contents

1.16. High-Performance Crypto Blocks

Available in select Intel® Agilex™ devices (refer to product tables for details), the 200 Gbps half-duplex crypto block consists of hardened logic that performs both encryption and decryption functions in a single circuit. Enabled devices contain multiple instances of the crypto block. The crypto blocks reside in the periphery of the device next to the IO cells, on the top and bottom edges.

The crypto block supports both the Advanced Encryption Standard (AES) and the SM4 standard. SM4 is an encryption standard used primarily in China, and AES is used worldwide. The crypto block also supports two different modes of operation, Galois Counter Mode (GCM) and XTS Mode, which is built on top of XOR-encrypt-XOR.

Each crypto block is supported by Ethernet MACsec soft IP, providing a complete MACsec solution for 100 Gbps full-duplex or 200 Gbps half-duplex throughput rates. The crypto block can also be used with third-party or customer-developed IPsec soft IP.