Intel® Agilex™ FPGAs and SoCs Device Overview

ID 683458
Date 6/09/2022
Document Table of Contents

1. Intel® Agilex™ FPGA and SoC Device Overview

Intel® Agilex™ FPGAs and SoCs are built using an innovative chiplet architecture, which provides agile and flexible integration of heterogeneous technology elements in a System-in-Package (SiP). The chiplet architecture enables Intel to address a broad array of acceleration and high-bandwidth applications with tailored and flexible solutions. Leveraging advanced 3D packaging technology such as Intel Embedded Multi-Die Interconnect Bridge (EMIB), the chiplet approach allows the combination of traditional FPGA die with purpose-built semiconductor die to create devices that are uniquely optimized for target applications.

The Intel® Agilex™ F- and I-Series (10-nm SuperFin technology), and Intel® Agilex™ M-Series ( Intel® 7 technology) FPGAs and SoCs deliver on average 50% higher core performance or up to 40% lower power over previous generation high-performance FPGAs. These Intel® Agilex™ FPGAs and SoCs accelerate system engineers’ delivery of today’s and tomorrow’s most advanced high-bandwidth applications through groundbreaking features:
  • Advanced analog functions such as 116 Gbps PAM4 transceivers
  • High-bandwidth processor interface interconnect including PCIe* Gen5 and industry's first Compute Express Link (CXL) in an FPGA
  • Up to 6 x 400GE or 12 x 200GE network interface connectivity in one device
  • Fourth generation scalable integrated memory controllers including support for DDR5, and Intel Optane™ persistent memory technology
  • Industry leading DSP support with up to 40 TFLOPs
  • High-performance hard crypto blocks supporting both AES and SM4 encryption standards
  • Quad-core Arm* Cortex* -A53 Hard Processor System
  • In-package HBM2e memory options
  • Second generation Intel® Hyperflex™ core fabric
  • Hard memory network-on-chip (NoC) enabling high bandwidth data movement between the FPGA fabric and the network-on-chip-attached memories without using FPGA resources

With Intel One API Software, software developers can use Intel® Agilex™ FPGAs and SoCs as an acceleration solution. The Intel One API Software provides a unified, single-source, software-friendly heterogeneous programming environment for diverse computing engines. The software includes a comprehensive and unified portfolio of developer tools for mapping software to the hardware that can accelerate the code.

Note: The information contained in this document is preliminary and subject to change.

Key Innovations in Intel® Agilex™ FPGAs and SoCs

  • Intel Advanced 10nm SuperFin Technology for Intel® Agilex™ F- and I-Series and Intel 7 Technology for Intel® Agilex™ M-Series
  • Innovative chiplet architecture allowing agile and flexible integration of heterogeneous technologies in a System-in-Package (SiP) for highly specific application requirements
  • Second Generation Intel® Hyperflex™ core fabric delivering on average 50% higher performance than previous generation high-performance FPGAs
  • Device densities of up to 4 million equivalent logic elements (LEs)
  • Transceiver data rates up to 116 Gbps
  • Configurable networking support including Hard 10/25/40/50/100/200/400 GE MAC, PCS, FEC in select tiles with IEEE 1588 support
  • Up to 6 x 400GE or 12 x 200GE networking capability in one device
  • High-performance crypto blocks supporting both AES and SM4 encryption standards
  • Hard PCI Express* Gen4 x16 (up to 16 Gbps per lane) or Gen5 x16 (up to 32 Gbps per lane) intellectual property (IP) blocks with port bifurcation support for 2x8 endpoint or 4x4 rootport
  • Compute Express Link (CXL) Hard IP block for cache-coherent and memory-coherent interfacing to Intel® Xeon® Scalable Processors
  • Hard memory controllers and PHY supporting DDR4 x72 at 3,200 Mbps per pin, DDR5 x80 at 5,600 Mbps per pin and Intel Optane™ persistent memory support
  • Hard memory NoC ensures high-speed data flow between memories and logic fabric over a dedicated network of communication channels, supporting over 1 terabytes per second (TBps) of aggregate memory bandwidth
  • Next generation of Intel Optane™ persistent memory support for Intel® Agilex™ M-Series
  • In-package HBM2e supporting up to 32 GB of high bandwidth memory
  • Hard fixed-point and IEEE 754 compliant hard floating-point variable precision digital signal processing (DSP) blocks providing up to 40 TFLOPS of FP16 or BFLOAT16 compute performance
  • Over 25K of 18x19 multipliers, or over 50K of 9x9 multipliers in a single device
  • Multi-level on-chip memory hierarchy with over 389 Mb of embedded RAM in the largest device, made up of 640b MLABs, 20 Kb M20K blocks, and 18 Mb eSRAM memory blocks
  • Quad-core 64-bit Arm* Cortex* -A53 embedded processors running up to 1.4 GHz in SoC devices
  • Programmable clock tree synthesis for flexible, low power, low skew clocking
  • Fractional synthesis and ultra-low jitter LC tank based transmit phase locked loops (PLLs)
  • Rectangular Packaging and Hex Pattern Ball Array to support more functionality/area while simplifying BOM list
  • Dedicated Secure Device Manager (SDM) that:
    • Manages Boot Process, Encryption, Authentication, and all Keys
    • Manages Tamper Sensors, and Scripted Device Erasure
    • Provides Secure Boot Support for Private Key Root Trust on FPGA, Public Key only on FPGA, and Physically Unclonable Function (PUF)-Based Keys
    • Provides Platform Attestation
  • Comprehensive set of advanced power saving features that deliver up to 40% lower power compared to previous generation high-performance FPGAs
  • Non-destructive register state readback and writeback, to support ASIC prototyping and other applications

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