MAX® 10 FPGA Design Guidelines

ID 683196
Date 5/15/2024
Document Table of Contents

1.3.4. Ensure your board design supports the Intel® FPGA IP Evaluation Mode tethered mode

You can program your FPGA and verify your design in hardware before you purchase an IP license by using the Intel® FPGA IP Evaluation Mode feature available for many IP cores. Intel® FPGA IP Evaluation Mode supports the following modes:
  • Untethered—your design runs for a limited time.
  • Tethered—your design runs for the duration of the hardware evaluation period. This mode requires an Intel FPGA download cable connected to the JTAG port on your board and a host computer that runs the Quartus® Prime Programmer. If you plan to use this mode, ensure that your board design supports this mode.