Intel® MAX® 10 FPGA Design Guidelines

ID 683196
Date 10/19/2020
Document Table of Contents Specify your simulation tool and use correct supported version

  • Intel provides the ModelSim* - Intel® FPGA Edition simulator Starter Edition and offers the higher-performance ModelSim* - Intel® FPGA Edition that enable you to take advantage of advanced testbench capabilities and other features.
  • In addition, the Intel® Quartus® Prime EDA Netlist Writer can generate timing netlist files to support other third-party simulation tools such as Synopsys* VCS* , Cadence NCSim, and Aldec Active-HDL.
  • If you use a third-party simulation tool, use the software version that is supported with your Intel® Quartus® Prime software version.
  • Specify your simulation tool in the EDA Tools Settings page of the Settings dialog box to generate the appropriate output simulation netlist. The software can also generate scripts to help you setup libraries in your tool with NativeLink integration.
  • Use only the model libraries provided with your Intel® Quartus® Prime software version. Libraries may change between versions and this can cause a mismatch with your simulation netlist.
  • To create a testbench in the Intel® Quartus® Prime software, on the Processing menu, point to Start and click Start Testbench Template Writer.

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