Intel® MAX® 10 FPGA Design Guidelines

ID 683196
Date 10/19/2020
Public
Document Table of Contents

1.3.1. Create detailed design specifications

Before you create your logic design or complete your system design, perform the following:
  • Specify the I/O interfaces for the FPGA
  • Identify the different clock domains
  • Include a block diagram of basic design functions
  • Consider a common design directory structure—if your design includes multiple designers, a common design directory structure eases the design integration stages.
  • When performing any UFM write or erase operation, make sure you provide stable power connection. Loss of power supply during a write or erase operation can cause damage to the device.