External Memory Interfaces (EMIF) IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 817467
Date 4/01/2024
Public

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4. Agilex™ 5 FPGA EMIF IP – End-User Signals

The following sections describe each of the interfaces and their signals, by protocol, for the Agilex™ 5 EMIF IP.