F-Tile Dynamic Reconfiguration Suite Intel® FPGA IP User Guide

ID 711009
Date 4/03/2023

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4.13. Determining Profile Numbers

In designs with multiple dynamic reconfiguration profiles but no reconfiguration IDs specified in the QSF file, you can inspect the .h header file located in the <project directory>/support_logic directory to determine the number for each profile. The filename convention is <design name>__ip_insts_<tile location>.h

Figure 22. Header File ExampleThis figure shows an example of the header file which contains multiple instances of the F-Tile Dynamic Reconfiguration Suite Intel® FPGA IP. Note that the profiles shown in this figure are unrelated to the example described in section: Example: Dynamic Reconfiguration Programming Sequence.
In the above example, you can observe that the design contains 41 individual profiles which are distributed across multiple instances of IPs. Also, you can determine that the Intel® Quartus® Prime Pro Edition software has assigned profile 1 to the IP Instance whose hierarchy is shown as:
If you want to dynamically reconfigure this IP instance with this profile, you can program the Next Profile 1 register with a 15’h1 in the programming sequence as described in section: Example: Dynamic Reconfiguration Programming Sequence.
Tip: If you need to maintain awareness of the currently loaded profile in all your protocol IPs that match these actual profile assignments, you should write the current active profile numbers to scratchpad registers in your design since the Dynamic Reconfiguration Suite IP does not keep a record of all active profiles. This is helpful if your application needs to know which profiles are active at any given time.

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