Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 8/19/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.1.2. Port List (P-Tile and F-Tile)

Figure 14. Multi Channel DMA IP for PCI Express Port List (P-Tile and F-Tile)