Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 8/19/2022

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Document Table of Contents Interrupt Mode

  • This mode requires the enablement of MSI-X completion signals from Hardware. That is done by enabling IFC_MCDMA_MSIX_ENABLE flag in the mcdma_ip_params.h file
  • An interrupt handler is used to process these signals in the kernel module
  • Interrupt handler, upon invocation, updates the descriptor queue and then passes the signal to the application via eventfds using eventfd_signal API