Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 8/19/2022
Public

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8.2.3. DPDK based application

MCDMA PMD exposes the device as an Ethernet device. By using environment abstraction layer utilities, application initializes the device, memory and interrupts based on the capability. By using ethdev APIs, this application performs DMA in H2D and D2H directions.

Multi-threading with Multiple Channels

Based on the input parameters, application starts multiple threads and submits DMA transactions one at a time in run to completion model. As multiple threads try to grab and release the channel at a time, MCDMA PMD handles synchronization problems while performing channel management.

Scheduling queues from threads

DPDK thread management libraries are used for thread creation and initialization. As more number of queues must be supported from single thread, test application schedules multiple queues on single threads for DMA operations.

  • BDF (Eg: “-b 86:00.0”)
  • Reads number of threads from user (-a <num>)
  • Calculate number of queues DMA need to perform. (-c <num>)
  • Calculate number of queues per thread and assigns multiple threads to single thread.
  • After every transaction, testapp swaps out a queue and swaps in other queue to perform DMA operation.
  • Batch size (-x <num>)

Software Process Kernel Context Switching

User space driver performs DMA operation. Hence, kernel context switch handling is not needed in any scenario.

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