Cyclone V Device Datasheet

ID 683801
Date 5/23/2023
Document Table of Contents

DCLK-to-DATA[] Ratio (r) for FPP Configuration

Fast passive parallel (FPP) configuration requires a different DCLK-to-DATA[] ratio when you turn on encryption or the compression feature.

Depending on the DCLK-to-DATA[] ratio, the host must send a DCLK frequency that is r times the DATA[] rate in byte per second (Bps) or word per second (Wps). For example, in FPP ×16 where the r is 2, the DCLK frequency must be 2 times the DATA[] rate in Wps.

Cyclone® V devices use additional clock cycles to decrypt and decompress the configuration data. If the DCLK-to-DATA[] ratio is greater than 1, at the end of configuration, you can only stop the DCLK (DCLK-to-DATA[] ratio – 1) clock cycles after the last data is latched into the Cyclone® V device.

Table 57.  DCLK-to-DATA[] Ratio for Cyclone® V DevicesThe specifications in this table are not applicable to Cyclone® V QS package.
Configuration Scheme Encryption Compression DCLK-to-DATA[] Ratio (r)
FPP (8-bit wide) Off Off 1
On Off 1
Off On 2
On On 2
FPP (16-bit wide) Off Off 1
On Off 2
Off On 4
On On 4