Cyclone V Device Datasheet

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ID 683801
Date 5/23/2023
Public
Document Table of Contents
Document Table of Contents x
Cyclone V Device Datasheet
Cyclone V Device Datasheet x
Electrical Characteristics Switching Characteristics Configuration Specifications I/O Timing Glossary Document Revision History for Cyclone® V Device Datasheet
Electrical Characteristics x
Operating Conditions
Operating Conditions x
Absolute Maximum Ratings Maximum Allowed Overshoot and Undershoot Voltage Recommended Operating Conditions DC Characteristics I/O Standard Specifications
Recommended Operating Conditions x
Recommended Operating Conditions Transceiver Power Supply Operating Conditions HPS Power Supply Operating Conditions
DC Characteristics x
Supply Current and Power Consumption I/O Pin Leakage Current Bus Hold Specifications OCT Calibration Accuracy Specifications OCT Without Calibration Resistance Tolerance Specifications OCT Variation after Power-Up Calibration Pin Capacitance Hot Socketing Internal Weak Pull-Up Resistor
I/O Standard Specifications x
Single-Ended I/O Standards Single-Ended SSTL, HSTL, and HSUL I/O Reference Voltage Specifications Single-Ended SSTL, HSTL, and HSUL I/O Standards Signal Specifications Differential SSTL I/O Standards Differential HSTL and HSUL I/O Standards Differential I/O Standard Specifications
Switching Characteristics x
Transceiver Performance Specifications Core Performance Specifications Periphery Performance HPS Specifications
Transceiver Performance Specifications x
Transceiver Specifications for Cyclone V GX, GT, SX, and ST Devices CTLE Response at Data Rates > 3.25 Gbps across Supported AC Gain and DC Gain CTLE Response at Data Rates ≤ 3.25 Gbps across Supported AC Gain and DC Gain Typical TX VOD Setting for Cyclone® V Transceiver Channels with termination of 100 Ω Transmitter Pre-Emphasis Levels Transceiver Compliance Specification
Core Performance Specifications x
Clock Tree Specifications PLL Specifications DSP Block Performance Specifications Memory Block Performance Specifications
Periphery Performance x
High-Speed I/O Specifications DLL Frequency Range Specifications DQS Logic Block Specifications Memory Output Clock Jitter Specifications OCT Calibration Block Specifications Duty Cycle Distortion (DCD) Specifications
HPS Specifications x
HPS Clock Performance HPS PLL Specifications Quad SPI Flash Timing Characteristics SPI Timing Characteristics SD/MMC Timing Characteristics USB Timing Characteristics Ethernet Media Access Controller (EMAC) Timing Characteristics I2C Timing Characteristics NAND Timing Characteristics Arm* Trace Timing Characteristics UART Interface GPIO Interface CAN Interface HPS JTAG Timing Specifications
HPS PLL Specifications x
HPS PLL VCO Frequency Range HPS PLL Input Clock Range HPS PLL Input Jitter
Configuration Specifications x
POR Specifications FPGA JTAG Configuration Timing FPP Configuration Timing Active Serial (AS) Configuration Timing DCLK Frequency Specification in the AS Configuration Scheme Passive Serial (PS) Configuration Timing Initialization Configuration Files Minimum Configuration Time Estimation Remote System Upgrades User Watchdog Internal Oscillator Frequency Specifications
FPP Configuration Timing x
DCLK-to-DATA[] Ratio (r) for FPP Configuration FPP Configuration Timing when DCLK-to-DATA[] = 1 FPP Configuration Timing when DCLK-to-DATA[] >1
I/O Timing x
Programmable IOE Delay Programmable Output Buffer Delay
Cyclone V Device Datasheet

Cyclone V Device Datasheet

This datasheet describes the electrical characteristics, switching characteristics, configuration specifications, and I/O timing for Cyclone® V devices.

Cyclone® V devices are offered in commercial and industrial grades. Commercial devices are offered in –C6 (fastest), –C7, and –C8 speed grades. Industrial grade devices are offered in the –I7 speed grade. Automotive devices are offered in the –A7 speed grade.

Cyclone® V SoC devices are also offered in a low-power variant, as indicated by the L power option in the device part number. These devices have 30% static power reduction for devices with 25K LE and 40K LE, and 20% static power reduction for devices with 85K LE and 110K LE. Note that the L power option devices are only available in –I7 speed grade, and have the equivalent operating conditions and timing specifications as the standard –I7 speed grade devices.

Table 1.  Low Power Variants
Density Ordering Part Number (OPN) Static Power Reduction
25K LE 5CSEBA2U19I7LN 30%
5CSEBA2U23I7LN
5CSXFC2C6U23I7LN
40K LE 5CSEBA4U19I7LN
5CSEBA4U23I7LN
5CSXFC4C6U23I7LN
85K LE 5CSEBA5U19I7LN 20%
5CSEBA5U23I7LN
5CSXC5C6U23I7LN
110K LE 5CSEBA6U19I7LN
5CSEBA6U23I7LN
5CSXFC6C6U23I7LN
To estimate total power consumption for a low-power device, listed in Table 1:
  1. Multiply the Total Static Power reported by the Early Power Estimator (EPE) by the appropriate scale factor:
    • For 25K LE and 40K LE devices, use 0.7
    • For 85K LE and 110K LE devices, use 0.8
  2. Add the result from Step 1 to the Total Dynamic Power reported by the EPE.

Section Content
Electrical Characteristics
Switching Characteristics
Configuration Specifications
I/O Timing
Glossary
Document Revision History for Cyclone V Device Datasheet

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