AN 847: Signal Tap Tutorial with Design Block Reuse: for Intel® Arria® 10 FPGA Development Board

ID 683712
Date 12/21/2020
Document Table of Contents

4.7. Step 7: Generating a Signal Tap File for the Root Partition

  1. Go to the shell from where you opened the Intel® Quartus® Prime software.
  2. In the shell, go to directory a10_pcie_devkit_design_block_reuse_stp/Root_Partition_Reuse/Developer, and then run the following command:
    quartus_stp top --create_signaltap_hdl_file --stp_file \