AN 847: Signal Tap Tutorial with Design Block Reuse: for Intel® Arria® 10 FPGA Development Board

ID 683712
Date 12/21/2020
Document Table of Contents

3.1. Step 1: Adding Files and Running Synthesis

Incorporate the black-box file to the Consumer project.
  1. Open the a10_pcie_devkit_design_block_reuse_stp/Core_Partition_Reuse/Consumer/top.qpf project file.
  2. Click Project > Add/Remove Files in Project.
  3. On the Files pane, click the browse (...) button next to the File name field to locate and select the /Core_Partition_Reuse/Consumer/ black box file.
  4. Click Open, and then click OK.
    The file is now a source file in the project.
  5. On the Compilation Dashboard, click Analysis & Synthesis to synthesize the design. When synthesis is complete, the Compilation Dashboard displays a check mark.