Intel® Cyclone® 10 GX Device Design Guidelines

ID 683703
Date 11/06/2017
Document Table of Contents

Planning in Bottom-Up and Team-Based Flows

If your design is created in multiple Intel® Quartus® Prime projects, it is important that the system architect provide guidance to designers of lower-level blocks to ensure that each partition uses the appropriate device resources. Because the designs are developed independently, each lower-level designer has no information about the overall design or how their partition connects with other partitions. This lack of information can lead to problems during system integration. The top-level project information, including pin locations, physical constraints, and timing requirements, should be communicated to the designers of lower-level partitions before they start their design.

Table 55.  Planning in Bottom-Up and Team-Based Flows Checklist
Number Done? Checklist Item
1   Perform timing budgeting and resource balancing between partitions to achieve best results, especially in team-based flows.

The system architect can plan design partitions at the top level and use the Intel® Quartus® Prime software Generate Bottom-Up Design Partition Scripts option under the Project menu to automate the process of transferring top-level project information to lower-level modules.