System Specification Device Selection Early System and Board Planning Pin Connection Considerations for Board Design I/O and Clock Planning Design Entry Design Implementation, Analysis, Optimization, and Verification Design Checklist Appendix: Cyclone® 10 GX Transceiver Design Guidelines Conclusion Document Revision History
Device and Design Power Optimization Techniques
This section lists several design techniques that can reduce power consumption. The results of these techniques are different from design to design.
Cyclone® 10 GX devices also offer "Programmable Power Technology" power saving technique.
|1||Use recommended design techniques and Intel® Quartus® Prime options to optimize your design for power consumption, if required.|
|2||Use the Power Optimization Advisor to suggest optimization settings.|
If your design includes many critical timing paths that require the high-performance mode, you might be able to reduce power consumption by using a faster speed grade device if available. With a faster device, the software might be able to set more device tiles to use the low-power mode.
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