System Specification Device Selection Early System and Board Planning Pin Connection Considerations for Board Design I/O and Clock Planning Design Entry Design Implementation, Analysis, Optimization, and Verification Design Checklist Appendix: Cyclone® 10 GX Transceiver Design Guidelines Conclusion Document Revision History
Device-Wide Output Enable Pin
|1||Turn on the device-wide output enable option, if required.|
Cyclone 10 GX devices support an optional chip-wide output enable that allows you to override all tri-states on the device I/Os. When this DEV_OE pin is driven low, all I/O pins are tri-stated; when this pin is driven high, all pins behave as programmed. To use this chip-wide output enable, turn on Enable device-wide output enable (DEV_OE) in the Intel® Quartus® Prime software before compiling your design in the General category of the Device and Pin Options dialog box. Ensure this pin is driven to a valid logic level on your board if you enable this pin in the Intel® Quartus® Prime software. Do not leave this pin floating.
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