System Specification Device Selection Early System and Board Planning Pin Connection Considerations for Board Design I/O and Clock Planning Design Entry Design Implementation, Analysis, Optimization, and Verification Design Checklist Appendix: Cyclone® 10 GX Transceiver Design Guidelines Conclusion Document Revision History
PLL and Transceiver Board Design Guidelines
|1||Connect all PLL power pins to reduce noise even if the design does not use all the PLLs.|
|2||Power supply nets should be provided by an isolated power plane, a power plane cut out, or thick trace of at least 20 mils.|
Plan your board design when you design a power system for PLL usage and to minimize jitter, because PLLs contain analog components embedded in a digital device.
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