R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 10/07/2022
Public
Document Table of Contents

3.2.2.5.17. VirtIO Device Specific Structure Length Register (Address: 0x036)

The length register indicates the length of the structure. The length may include padding, fields unused by the driver, or future extensions.

Table 35.  VirtIO Device Specific Structure Length Register
Bit Location Description Access Type Default Value
31:0 Structure Length RO Settable through the IP Parameter Editor

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