R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 10/07/2022
Public
Document Table of Contents

6.1.3.1. Advanced Error Reporting (AER)

Each PCI Express compliant device must implement a basic level of error management and can optionally implement advanced error management. The PCI Express Advanced Error Reporting Capability is an optional Extended Capability that may be implemented by PCI Express device functions supporting advanced error control and reporting. The R-Tile Avalon-ST IP for PCI Express implements both basic and advanced error reporting. You can use the Hard IP Reconfiguration Interface to access the AER registers and also the PCIe Debug Toolkit.

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