R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 10/07/2022
Public
Document Table of Contents

4.3.1.2.1. Credit Interface - Data and Header

The credit interface is used to implement flow control for the data movement between the user application interface and each IP block. Each header type (P,NP,CPL) and data type (P,NP,CPL) has an independent credit handling. One data credit consists of 16 bytes. One header credit includes the TLP Header, 1DW prefix (if present) and the digest (if present).The section below describes the credit initialization and update flow.

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