Intel® Stratix® 10 10GBASE-KR PHY IP Core User Guide

ID 683500
Date 1/29/2021
Public
Document Table of Contents

1.4. Resource Utilization

The following numbers were obtained by compiling the PHY IP core for Intel® Stratix® 10 devices using the Intel® Quartus® Prime Pro Edition 17.1. The numbers of ALMs and logic registers are rounded up to the nearest 100.
Table 4.  Resource Utilization
IP variation ALMs Registers M20K Blocks
Intel® Stratix® 10 10GBASE-KR PHY IP core (with Auto-negotiation and Link training) 2900 3600 8

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