Intel® Stratix® 10 10GBASE-KR PHY IP Core User Guide

ID 683500
Date 1/29/2021
Public
Document Table of Contents

2.7. Compiling the Full design

You can use the Start Compilation command on the Processing menu in the Intel® Quartus® Prime software to compile your design. After successfully compiling your design, program the targeted Intel FPGA with the Programmer and verify the design in hardware.
Note: The Intel® Stratix® 10 10GBASE-KR PHY IP core design example synthesis directories include Synopsys Design Constraint (.sdc) files that you can copy and modify for your own design.

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