Intel® Stratix® 10 10GBASE-KR PHY IP Core User Guide

ID 683500
Date 1/29/2021
Public
Document Table of Contents

5.1. Register Map

Table 9.   Intel® Stratix® 10 10GBASE-KR PHY Register Map
Word Offset Register Type
0x4B0-0x4BF General 10GBASE-KR registers
0x4C0-0x4CF Auto-negotiation registers

(only available when you turn on Enable Auto-Negotiation parameter)

0x4D0-0x4EF Link training registers

(only available when you turn on Enable Link Training parameter)

Did you find the information on this page useful?

Characters remaining:

Feedback Message