Intel® Stratix® 10 10GBASE-KR PHY IP Core User Guide

ID 683500
Date 1/29/2021
Public
Document Table of Contents

7.1. Quick Start Guide

The Intel® Stratix® 10 10GBASE-KR PHY IP core provides a simulation testbench and a hardware design example that supports compilation and hardware testing. When you generate the design example, the parameter editor automatically creates the files necessary to simulate, compile, and test the design in hardware. You can download the compiled hardware design and run it on the Intel® Stratix® 10 GX Signal Integrity Development Kit. The testbench and example design support all the parameter combination of the 10GBASE-KR PHY IP core.

In addition, Intel provides a compilation-only example project that you can use to quickly estimate IP core area and timing.

Figure 9. Design Example Usage

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