Intel® Stratix® 10 10GBASE-KR PHY IP Core User Guide

ID 683500
Date 1/29/2021
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7.2. Design Example Description

The design example demonstrates the functions of the Intel® Stratix® 10 10GBASE-KR PHY IP core. You can generate the design from the Example Design tab in the Intel® Stratix® 10 10GBASE-KR PHY IP parameter editor.

To generate the design example, you must first set the parameter values for the IP core variation you intend to generate in your end product. Generating the design example creates a copy of the IP core; the testbench and hardware design example use this variation as the DUT.

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