Intel® Agilex™ FPGAs and SoCs Device Overview

ID 683458
Date 9/26/2022
Public
Document Table of Contents
1. Overview of the Intel® Agilex™ FPGAs and SoCs 2. Intel® Agilex™ FPGAs and SoCs Family Plan 3. Second Generation Intel® Hyperflex™ Core Architecture 4. Adaptive Logic Module in Intel® Agilex™ FPGAs and SoCs 5. Internal Embedded Memory in Intel® Agilex™ FPGAs and SoCs 6. Variable-Precision DSP in Intel® Agilex™ FPGAs and SoCs 7. Core Clock Network in Intel® Agilex™ FPGAs and SoCs 8. General Purpose I/Os in Intel® Agilex™ FPGAs and SoCs 9. I/O PLLs in Intel® Agilex™ FPGAs and SoCs 10. External Memory Interface in Intel® Agilex™ FPGAs and SoCs 11. Hard Processor System in Intel® Agilex™ SoCs 12. FPGA Transceivers in Intel® Agilex™ FPGAs and SoCs 13. Heterogeneous 3D Stacked HBM2E DRAM Memory in Intel® Agilex™ M-Series FPGAs and SoCs 14. High-Performance Crypto Blocks in Intel® Agilex™ F-Series and I-Series FPGAs and SoCs 15. MIPI* Protocols Support in Intel® Agilex™ D-Series FPGAs and SoCs 16. Balls Anywhere Package Design of Intel® Agilex™ D-Series FPGAs and SoCs 17. Configuration via Protocol Using PCIe* for Intel® Agilex™ FPGAs and SoCs 18. Device Configuration and the SDM in Intel® Agilex™ FPGAs and SoCs 19. Partial and Dynamic Configuration of Intel® Agilex™ FPGAs and SoCs 20. Device Security for Intel® Agilex™ FPGAs and SoCs 21. SEU Error Detection and Correction in Intel® Agilex™ FPGAs and SoCs 22. Power Management for Intel® Agilex™ FPGAs and SoCs 23. Intel® Software and Tools for Intel® Agilex™ FPGAs and SoCs 24. Revision History for the Intel® Agilex™ FPGAs and SoCs Device Overview

12.2.1. PMA Features in Intel® Agilex™ D-Series Transceivers

The transmitter, receiver, and high speed clocking resources form the PMA channels. The transmit features deliver exceptional signal integrity at data rates up to 28.1 Gbps NRZ. Additionally, each PMA features advanced equalization circuits that compensate for transmission losses across a wide frequency spectrum.
Table 38.  Transceiver PMA Features in Intel® Agilex™ D-Series FPGAs and SoCs
Feature Capability
Data rates Up to 28.1 Gbps
Optical module support

SFP+ optical module support

Cable driving support

SFP+ Direct Attach

Transmit pre-emphasis

One post-tap and two pre-taps for NRZ

Dynamic reconfiguration Independent control of each transceiver channel Avalon® memory-mapped interface for transceiver flexibility

Multiple PCS–PMA and PCS to FPGA fabric interface widths

  • Flexible deserialization width, encoding, and reduced latency
  • Transceiver (PMA with optional FEC or PCS) to FPGA fabric interface—from 8 bits up to 66 bits options

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