1.14. Heterogeneous 3D Stacked HBM2e DRAM Memory
Intel® Agilex™ M-Series devices include options for integrated HBM2e DRAM memory, inside the package with the high-performance Intel 7 FPGA fabric, high-speed transceivers, and hard processor system. This results in a near-memory compute implementation that allows the in-package HBM2e to deliver up to 820 GBps in total aggregate memory bandwidth, over a 10x increase in bandwidth compared to DDR5 memory. A near memory configuration also reduces system power by reducing traces between the FPGA and memory, while also reducing board area.
Select Intel® Agilex™ M-Series devices have two integrated HBM2e DRAM memory stacks inside the package. Each of these DRAM stacks contains:
- 8 GB or 16 GB density per stack, 16 GB or 32 GB total density per device
- 410 GBps memory bandwidth per stack, 820 GBps total aggregate memory bandwidth per device
- 8 independent channels, each 128-bits wide, or 16 independent pseudo channels, each 64-bits wide (in a pseudo channel mode)
- Data transfer rates up to 3.2 Gbps, per signal, between core fabric and HBM2e DRAM memory
Intel® Agilex™ M-Series devices can interface directly from the fabric to the HBM2e or through the hardened memory NoC.
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