Intel® Agilex™ Power Management User Guide

ID 683373
Date 9/06/2022
Public
Document Table of Contents

3.2.1. Guidelines for I/O Pins in GPIO, HPS, and SDM Banks During Power Sequencing

Intel® Agilex™ devices do not support hot-socketing and require a specific power sequence. Design your power supply solution to properly control the complete power sequence.

Adhere to the following guidelines to prevent unnecessary current draw on the I/O pins located in the GPIO, HPS, and SDM banks. These guidelines are applicable for unpowered, power up to POR, POR delay, POR delay to configuration, configuration, initialization, user mode, and power down device states.

  • The I/O pins in these banks can be in one the following states:
    • GPIO banks—tri-stated, driven to ground, or driven to the VCCIO_PIO level.
    • HPS banks—tri-stated, driven to ground, or driven to the VCCIO_HPS level.
    • SDM banks—tri-stated, driven to ground, or driven to the VCCIO_SDM level.
  • While the Intel® Agilex™ device is powering up or down:
    • The input signals of an I/O pin at all times must not exceed the I/O buffer power supply rail of the bank where the I/O pin resides.
    • If you use a pin in a GPIO bank with 1.5 V VCCIO_PIO, the pin voltage must not exceed the VCCIO_PIO rail or 1.2 V, whichever is lower.
  • While the Intel® Agilex™ device is powering up, powering down, or not turned on, the GPIO, SDM, and HPS pins can tolerate a maximum of 10 mA per pin and a total of 100 mA per I/O bank.
  • After the Intel® Agilex™ device fully powers up, the voltage levels for the GPIO, SDM, and HPS pins must not exceed the DC input voltage (VI) value.
Table 4.  Guideline Examples
Condition Guideline
The VCCIO_SDM pin ramps up and at period X, the VCCIO_SDM voltage is 0.9 V. At period X, keep the signals driven by the device connected to the SDM I/O pin at a voltage of 0.9 V or lower.
The VCCIO_PIO pin ramps up and at period X, the VCCIO_PIO voltage is 1.1 V. At period X, keep the signals driven by the device connected to the GPIO I/O pin at a voltage of 1.1 V or lower.
The 1.5 V VCCIO_PIO pin ramps up and the voltage continues to rise pass the 1.2 V level. Keep the GPIO I/O pin voltage at 1.2 V or lower until the Intel® Agilex™ device fully powers up.

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