Intel Agilex® 7 Power Management User Guide

ID 683373
Date 1/06/2024
Public
Document Table of Contents

5.2. DSP and M20K Power Gating

Intel Agilex® 7 devices support power gating for both DSP blocks and M20K memory blocks. By default, the Intel® Quartus® Prime software automatically configures unused DSP blocks and M20K memory blocks to be power gated.