External Memory Interfaces Agilex™ 7 F-Series and I-Series FPGA IP User Guide

ID 683216
Date 3/29/2024
Document Table of Contents

11.4.1. Signals to Monitor with the Signal Tap Logic Analyzer

This topic lists the memory controller signals you should consider analyzing for different memory interfaces. This list is not exhaustive, but is a starting point.

Monitor the following signals:

  • status_local_cal_success
  • status_local_cal_fail
  • local_reset_done
  • local_reset_req
  • pll_locked
  • pnf_per_bit_persist
  • pnf_per_bit
  • amm_write
  • amm_writedata
  • amm_read
  • amm_readdata
  • amm_readdatavalid
  • amm_address