External Memory Interfaces Agilex™ 7 F-Series and I-Series FPGA IP User Guide

ID 683216
Date 3/29/2024
Document Table of Contents

11.5. Hardware Debugging Guidelines

Before debugging your design, confirm that it follows the recommended design flow. Refer to the Intel® Agilex™ 7 F-Series and I-Series EMIF IP Design Flow section in chapter 1 of this user guide.

Always keep a record of tests, to avoid repeating the same tests later. To start debugging the design, perform the following initial steps.