External Memory Interfaces Agilex™ 7 F-Series and I-Series FPGA IP User Guide

ID 683216
Date 3/29/2024
Document Table of Contents

4.4.14. sideband4

address=47(32 bit)

Field Bit High Bit Low Description Access
mmr_self_rfsh_req 3 0

Self-refresh request. When asserted, indicates a self-refresh request to DRAM. All 4 bits must be asserted or de-asserted at the same time. User clear to exit self refresh.