External Memory Interfaces Agilex™ 7 F-Series and I-Series FPGA IP User Guide

ID 683216
Date 3/29/2024
Document Table of Contents

4.4.13. sideband1

address=44(32 bit)

Field Bit High Bit Low Description Access
mmr_refresh_req 3 0

Rank Refresh Request. When asserted, indicates a refresh request to the specific rank. Controller clears this bit to 0 when the refresh is executed.