External Memory Interfaces Agilex™ 7 F-Series and I-Series FPGA IP User Guide

ID 683216
Date 3/29/2024
Document Table of Contents

5.3.5. Obtaining the master_test_program.sv File

You require the master_test_program.sv to initiate write/read transactions and to verify that the read data matches the write data.

As a start, you can re-use the master_test_program available in the qsys-example directory. Refer to the Mentor® Verification IP Altera® Edition AMBA AXI3TM/AXI4TM User Guide for information on writing your own master_test_program.

The following steps outline how to copy the example master_test_program.sv from the qsys-example directory into your simulation directory on a UNIX platform:

  1. Change to the directory where the ed_sim.v is located:
    cd <example_design_path>/sim/ed_sim/sim
  2. Copy the master_test_program.sv to the same directory:
    cp   $QUARTUS_ROOTDIR/../ip/altera/mentor_vip_ae/axi4/qsys-examples/ex1_back_to_back_sv/master_test_program.sv