External Memory Interfaces Agilex™ 7 F-Series and I-Series FPGA IP User Guide

ID 683216
Date 3/29/2024
Document Table of Contents

4.4.4. sbcfg1

address=24(32 bit)

Table 63.  
Field Bit High Bit Low Description Access
Reserved 0 0 Reserved. Read
cfg_t_param_arf_to_valid 10 1 Auto Refresh to valid DRAM command window. Read
Reserved 31 11 Reserved. Read