External Memory Interfaces Agilex™ 7 F-Series and I-Series FPGA IP User Guide

ID 683216
Date 9/19/2024
Public
Document Table of Contents

4.1.1.25. emif_calbus_clk for DDR4

EMIF calibration component clock input interface
Table 38.  Interface: emif_calbus_clkInterface type: Clock Output
Port Name Direction Description
calbus_clk Output EMIF Calibration component bus for the clock