Accelerator Functional Unit Developer Guide: Intel FPGA Programmable Acceleration Card N3000 Variants

ID 683190
Date 7/15/2022
Document Table of Contents

5.3. Set Up Connections

  1. Set up a network connection between the instrumented FPGA AFU and your Signal Tap GUI. You can set the network connection based on whether you are using a remote or local debugging configuration. See diagram below illustrating the connection steps:
    Figure 44. Remote Debugging
    Figure 45. Local Debugging
  2. Use the OPAE tool mmlink to enable your host system for remote Signal Tap. This tool is included with the Intel® Acceleration Stack for the N3000
  3. Open a TCP port to accept incoming connection requests from remote debug hosts.
    # mmlink -P 3333 –B 0xb2 Note, -B is the bus number of the target N3000 to connect
     ------- Command line Input START ---- 
     Segment : -1
     Bus : 02
     Device : -1
     Function : -1
     Socket-id : -1
     Port : 3333
     IP address :
     ------- Command line Input END ---- 
    PORT Resource found.
    Remote STP : Assert Reset
    Remote STP : De-Assert Reset
    Read signature value 53797343 to hw
    Read version value 1 to hw
    Read write fifo capacity value 32 to hw
    m_listen: 4
    listening on ip:; port: 3333

    You can debug remotely from a remote machine connected to your PAC host or you can debug on the local PAC host.

    • If debugging on a remote host:
      1. Make sure Intel® Quartus® Prime Pro Edition version 19.2 is installed and the directory $N3000_EXAMPLE_ROOT/hello_afu/hw/pac/remote_debug is copied to the remote host.
      2. Use System Console on the remote host to connect to the debug target host IP and TCP port using the following command:
        $ cd Remote host directory with $N3000_EXAMPLE_ROOT/hello_afu/hw/pac/\
        $ system-console --rc_script=mmlink_setup_profiled.tcl \ 
        remote_debug.sof <IP Address of target PAC host> 3333 
        Note: You must have the System Console executable binary added to your PATH variable. The System Console executable binary is in the Intel® Quartus® Prime installation directory. An example of how to update your PATH variable is the following:
        export PATH=$PATH:~/inteldevstack/intelFPGA_pro/quartus/sopc_builder/bin
    • If debugging on local host:
      1. Start System Console on the local host as shown below:
        $ # cd $N3000_EXAMPLE_ROOT/hello_afu/hw\
        $ system-console --rc_script=mmlink_setup_profiled.tcl \
        remote_debug.sof localhost 3333 
        Whether local or remote, the Intel® Quartus® Prime tool System Console starts a new GUI and runs the mmlink_setup_profiled.tcl setup script as shown below:

        The script takes 1-2 minutes to complete. When the “Remote system ready” message is displayed Signal Tap may be connected for debugging.

      2. Open Intel® Quartus® Prime GUI on the machine that is performing the debugging (i.e. local or remote host). In Intel® Quartus® Prime GUI, select File > Open and navigate to the hello_afu.stp file created in previous steps, select and open this file. The Signal Tap GUI comes up as shown below:
      3. In the Signal Tap GUI top right corner, “Hardware” pull down, where it says “Please Select”, click on the up/down arrows to bring up the hardware selection – select the choice that has System Console …. as shown below:

        The instance manager should show "Ready to acquire".

      4. Review the code and notice the following line:
      5. Enable the Signal Tap instance to capture data when cp2af_sRxPort.c0.mmioWrValid.
  4. Select the signal name, then right click the “Trigger Conditions” value and set this to 1 as shown below:
  5. Enable the hello_afu Signal Tap instance by entering F5.
  6. Modify the N3000 host application to add a shared connection to the FPGA in order to create host transactions that can cause the hello_afu STP interface to activate. This shared connection allows the Signal Tap and host communication to be shared through the PCIe* bus.
    1. Edit $N3000_EXAMPLE_ROOT/hello_afu/hw/afu/sw/hello_afu.c to change the following line from:
      res = fpgaOpen(afc_token, &afc_h, 0);
      res = fpgaOpen(afc_token, &afc_h, FPGA_OPEN_SHARED);
    2. Save hello_afu.c and build the code
      $ make
    3. Run the hello_afu host code as root or sudo as shown below:
      # ./hello_afu 
      Running Test
      AFU DFH REG = 1000010000000000
      AFU ID LO = 9722d43375b61c66
      AFU ID HI = 850adcc26ceb4b22
      AFU NEXT = 00000000
      AFU RESERVED = 00000000
      Reading Scratch Register (Byte Offset=00000080) = 00000000
      MMIO Write to Scratch Register (Byte Offset=00000080) = 123456789abcdef
      Reading Scratch Register (Byte Offset=00000080) = 123456789abcdef
      Setting Scratch Register (Byte Offset=00000080) = 00000000
      Reading Scratch Register (Byte Offset=00000080) = 00000000
      Done Running Test
    Your Signal Tap instance captures the write transactions as shown below:

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