Accelerator Functional Unit Developer Guide: Intel FPGA Programmable Acceleration Card N3000 Variants

ID 683190
Date 7/15/2022
Document Table of Contents

3.2.1. In-Line Data Path

The N3000 supports multiple data path options. Your application can use one or more of these data options.

Ethernet data can be processed in-line where traffic traverses: QSFP > Intel® Arria® 10 FPGA > Intel® Ethernet Controller XL710-BM2 NIC > Host and/or QSFP > Intel® Arria® 10 FPGA > Host. These data paths are shown below:
Figure 3. Data Path

Data can also be processed in a look-aside configuration where the data comes into the Intel® Arria® 10 FPGA from the host PCIe* interface, the FPGA processes the data and then sends the data back to the host through the PCIe* connection. Some examples of look-aside processing are compression/de-compression and encryption/decryption.